1. Field of the Invention
The present invention relates to a semiconductor memory device and a driving method thereof, and particularly to a technique of storing multi-bit information on a nonvolatile memory.
2. Description of the Background Art
Higher packing density of semiconductor memories has been achieved by scaling down the cell size in accordance with the so-called scaling rule. Recently, however, the scale-down of cell size is becoming increasingly difficult due to technical reasons in lithography and the like, or due to the limits of how thin a gate insulating film, a source diffusion layer and a drain diffusion layer constituting a memory cell can be made. Therefore, for one of the methods of solving this problem, attempts are being made to develop the technology of storing multi-bit information on one memory cell.
What is expected as a multi-bit nonvolatile memory is a so-called MONOS (metal-oxide-nitride-oxide-silicon)-type nonvolatile semiconductor memory device, for example (cf. B. Eitan, et al., “Can NROM, a 2-bit, Trapping Storage NVM Cell, Give a Real Challenge to Floating Gate Cells?” SSDM (1999)). In this MONOS-type nonvolatile semiconductor memory device, a gate insulating film has a so-called ONO (oxide-nitride-oxide) structure, and hot electrons are injected in two separate positions through a silicon oxide film, to thereby allow 2-bits of information to be stored on one memory cell.
Japanese Patent Application Laid-Open No. 2001-110918 discloses that a gate insulating film in a MONOS-type nonvolatile semiconductor memory device has silicon nitride films in two layers. Hot electrons are injected in two separate positions, and a distinction is made between the state in which hot electrons are injected only into a first-layer silicon nitride film and the state in which hot electrons are injected into both the first-layer and second-layer silicon nitride films, to thereby allow 4-bits of information to be stored on the memory cell.
In the conventional MONOS-type nonvolatile semiconductor memory device, however, only 2-bits of information can be stored on one memory cell. The invention described in Japanese Patent Laid-Open No. 2001-110918 allows 4-bits of information to be stored on one memory cell, but causes the gate insulating film to have a complicated structure, which disadvantageously increases the number of manufacturing steps and accordingly increases manufacturing costs.